Artificial intelligence and machine learning could become dramatically more efficient, thanks to a new type of computer component developed by researchers at the University of California, Santa Barbara and Tohoku University, in collaboration with the Taiwan Semiconductor Manufacturing Company (TSMC). The technology is based on "probabilistic bits," or "p-bits", which are hardware elements that naturally fluctuate between 0 and 1. Unlike conventional digital bits, which are fixed in value, p-bits can efficiently explore many possibilities. This makes them well-suited for solving problems such as optimization and inference, tasks that are difficult for traditional computers.

Until now, most p-bit designs have required analog electronic components to control how often the output is 0 or 1. These analog parts, called digital-to-analog converters (DACs), are bulky, power-hungry, and expensive, hindering scalability. The new work offers a breakthrough: a fully digital p-bit design that removes DACs entirely.

"The reliance on analog signals was holding back progress," says Shunsuke Fukami (Tohoku University). "So, we discovered a digital method to adjust the behavior of p-bits without needing the typically used big, clunky analog circuits."

Their approach uses small electronic devices called magnetic tunnel junctions (MTJs), which naturally switch between two states in a random manner. By feeding this 50/50 random bitstream into a simple digital circuit that gradually combines signals with controlled timing, the team can smoothly tune how likely the output is to be 0 or 1. Importantly, the same digital circuitry can also compensate for natural device-to-device variations in these stochastic elements, making the approach robust to manufacturing non-uniformities.

This approach enables two capabilities that have long been obstacles in hardware-based probabilistic computing. First, the system updates its internal state in a self-organizing manner, meaning different elements naturally avoid interfering with each other. This allows many p-bits to work in parallel without a central controller. Second, the design allows a form of "on-chip annealing", a method for gradually narrowing down solutions, by changing basic timing settings rather than completely rewriting stored parameters.

This remarkable new design developed by the research team requires far less area and power than alternatives, while also being compatible with modern semiconductor manufacturing. The researchers expect that this advance will make probabilistic computing practical in applications ranging from artificial intelligence to logistics, scientific discovery, and future computing systems.

The findings were presented at the 71st Annual IEEE International Electron Devices Meeting (IEDM 2025) on December 10, 2025 (JST).