Optical packaging of photonic integrated circuits: bottlenecks and potential solutions
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Optical packaging of photonic integrated circuits: bottlenecks and potential solutions

13/10/2026 Compuscript Ltd


Announcing a new publication from Opto-Electronic Technology; DOI 10.29026/oet.2026.260006.

This article studies methods for coupling and automation in the optical packaging of photonic integrated circuits (PICs) consolidating the latest literature review in new coupling methods and/or techniques, that can be later explored by the research community, while encompassing some of the theory required to understand the constrains that this technology imposes, such as considerations in packaging design, coupling and tolerance limitations, alignment and attaching. Considering the novelty of such field, the iterative review of such content helps researchers to maintain a state-of-the-art approach in the several industries working to scale PICs. The article allows for researchers outside the realm of optical packaging and PICs to have a more comprehensive view about the topic and current state-of-the-art as well as the requirements needed for each industry. The telecom industries require robust, high performance and cost-efficient mass-produced devices for consumer-grade level. Quantum applications require highly sensitive and precise devices. Bio applications strict sterilization and bio-hazard protocols often dictate the sensors to be single-use devices, highlighting the need for cost-efficient high sensitivity devices. The space industry requires precision while also entailing robustness and radiation resistant devices. The authors believe that increased awareness in the importance of the optical packaging will help the technology to progress from a lab stage perspective to a consumer ready technology. The paper focus on two-photon polymerization (TPP) and self-written waveguides (SWW) as good candidates to fulfill the requirements in the optical packaging of these devices, while exploring some the already proven capabilities of such techniques.

The paper addresses several bottlenecks currently undermining the scale of such technologies, especially in the telecommunications industry, while also introducing some of the constrains other industries are faced with when performing the optical packaging of PICs, such as mode mismatch and tolerance in alignments.

The two main approaches to connect the optical ports of the PICs are grating couplers and edge couplers, with recent methods such as TPP and SWW exploiting these to improve their capabilities. The following are some of the results evaluated in the paper:

The paper evaluates several optical coupling methods, comparing their insertion loss, bandwidth, alignment tolerance, fabrication status, and relative cost.

Among the approaches examined, a two-tier silicon/silicon nitride (Si/SiN) taper achieved the lowest insertion loss of 0.06 dB, with a bandwidth of 100 nm at less than 0.3 dB loss. Alignment tolerance was not reported. The method was classified as an intermediate-cost approach and has been fabricated.
Free-form TPP micro-optics demonstrated an insertion loss of 0.5 dB, a 1 dB bandwidth of 300 nm, and an alignment tolerance of ±2.2 µm. The method was classified as an intermediate-cost approach and has been fabricated.

An apodized grating coupler incorporating a metal mirror achieved an insertion loss of 0.58 dB, a 1 dB bandwidth of 38 nm, and an alignment tolerance of ±2.4 µm. This method was classified as a higher-cost approach and has been fabricated.

A tapered SWW approach demonstrated an insertion loss of 0.7 dB and an alignment tolerance of ±5 µm. Bandwidth was not reported. The method was classified as a lower-cost approach and has been fabricated.

A 60 nm apodized grating coupler achieved an insertion loss of 1.1 dB, a 1 dB bandwidth of 38.8 nm, and an alignment tolerance of ±2.4 µm. The method was classified as a lower-cost approach and has been fabricated.

The two-tier taper Si/SiN despite presenting the best results in terms of insertion loss, does not report the tolerance in alignment, which typically is lower for edge couplers than grating couplers. Generally, the main issue with gratings is the low bandwidth and difficulty in integrating with optical fibers packaging, due to usually requiring a surface coupling with a certain angle. TPP has proven to be an effective technique able to create Telcordia compliant devices, but also devices capable of working in cryogenic environments. SWW, despite being a more academical subject and less matured technology has shown promising results in several studies, with the major selling point, the fact that is a much less capital intense technique, which in terms, allows the industries to highly expand the manufacturing lines, comparatively to TPP.

The capability of relaxing tolerances in such strict optical systems allows for the usage of passive assembly methods, which consequently allow to scale the manufacturing of devices with current state-of-the-art assembly machinery. The usage of mechanical structures that allow to scale the manufacturing of such devices such as v-grooves for fiber assembly and lithographed interconnectors for PICs.

The paper introduces possible algorithms as Nelder-Mead Simplex and pattern search algorithms, but also more novel approaches such as deep learning, physics informed neural networks and AI coupled with parallel gradient search. The paper also addresses prospects for the improvement of the referred processes, such as inverse designed coupling structures, new engineered materials, wafer-level packaging, AI, and the usage of optical frequency domain reflectometry (OFDR), highlighting changes that will allow the optical packaging to be more cost-efficient and scalable, while maintaining the required metrics necessary for such devices to comply with the industries adopting them.

The author’s vision is that PICs will dominate across different industries in the 21st century and beyond, as the electronic integrated circuits did in the 20th century and are currently still doing, delivering performance and efficiency improvement of optical systems, while reducing their cost, size and weight. The introduction of TPP, SWW, nanoimprint lithography and wafer-level packaging combined with artificial intelligence can help to mitigate issues addressed in the paper which currently result in bottlenecks for industries struggling to scale these new technologies.

Keywords: packaging, photonic integrated circuits, self-written waveguides, two-photon-polymerization
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CICECO’s multidisciplinary expertise spans a broad range of scientific fields, including functional materials, microelectronics, nanosystems, nanosensors, spectroscopy, and computational multiscale modeling. In addition, CICECO includes the PHASE Lab, a research group dedicated to Photonics, Advanced Sensing and Engineering. PICadvanced, founded in 2014, is an industry pioneer and Portuguese leader in innovation, mainly for the telecommunication market with its innovative and reliable transceiver and optical components lines. PICadvanced is involved or contains as track record multiple Portuguese and European projects focused on photonic integration from design to its packaging. The relation with industry and academia is extensive, where a network with different research institutes such as Instituto Telecomunicações, INESC-MN and UPVFab in Spain indicates that PICadvanced is working in technology transfer and on the state of the art of the technology.
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Opto-Electronic Technology (OET) is an international, peer-reviewed and open access English language journal. OET publishes reviews, research articles and letters covering engineering technologies and applications of optics, photonics and optoelectronics.
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More information: https://www.oejournal.org/oet/en/
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CN 51-1811/O4
Contact Us: oet@ioe.ac.cn
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Rendeiro R, Neto H, Vaz D et al. Optical packaging of photonic integrated circuits: bottlenecks and potential solutions. Opto-Electron Technol 2, 260006 (2026). DOI: 10.29026/oet.2026.260006

Rendeiro R, Neto H, Vaz D et al. Optical packaging of photonic integrated circuits: bottlenecks and potential solutions. Opto-Electron Technol 2, 260006 (2026). DOI: 10.29026/oet.2026.260006
Fichiers joints
  • Overlap integral result of SMF and waveguide modes with X and Y displacements and respective insertion loss, X corresponds to 7 µm side and Y to 4.3 µm considering the waveguide orientation at z=0 (fiber at the edge of the PIC).
13/10/2026 Compuscript Ltd
Regions: Europe, Ireland, Spain, North America, United States
Keywords: Applied science, Technology

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